Chuangfeixin’s core team secured OTP-related patents as early as 2013, with deep expertise in anti-fuse OTP technology. The anti-fuse OTP IP employs oxide-layer breakdown programming and requires no ...

Siemens is making its AI-enhanced electronic systems design technology accessible to small and mid-sized businesses (SMB) with the release of PADS Pro Essentials software and Xpedition Standard ...

In an interview published in the Korean tech medium Chosun Biz, AMD’s Senior Vice President took a clear stance on the company’s future manufacturing strategy: From AMD’s perspective, TSMC is ...

In 2010, a modest summer project at UC Berkeley sought a suitable instruction set architecture (ISA). Now, 15 years later, RISC-V is a global alternative to commercial chip architectures.

With PADK, users access a secure, web-based interface that facilitates real-time collaboration without requiring deep ...

According to Etnews, Samsung is preparing for the future semiconductor market and plans to introduce glass substrates to improve packaging. This can be done by replacing Silicon interposers with Glass ...

Input/Output Overload: Modern vehicles have over 90 smart sensors, 800 sensors and loads, requiring zonal MCUs to have denser ...

This is part of a move to boost the leading edge performance of its chips for the Internet of Things, Sailesh Chittipeddi became Executive Vice President and General Manager of IoT and Infrastructure ...

As part of this initiative, Analogue Insight and Tetrivis have signed a Memorandum of Understanding (MoU) to jointly develop the chiplet, aligning their IP roadmaps, technology resources, and customer ...

However, while the spotlight often falls on design and computing power, another critical discipline ensures these chips are safe to deploy: Design for Testability (DFT). As chips grow more complex, ...

Winning the ECSO STARtup Award 2025 gives Xiphera increased visibility within the European cybersecurity ecosystem and opens doors for new collaborations and customer relationships.