EDN

New programmable device family combines CPLD and FPGA features

In its third major and field-programmable gate array (FPGA) announcement in the last 12 months, Lattice Semiconductor Corp. has introduced MachXO, a new product family that combines the key features ...
Electronic Design

CPLD And FPGA Families Add New Members

Adding to the CoolRunner-II CPLD family, the XC2C32A and XC2C64A debut in smaller MLF packages than their predecessors and integrate an additional I/O bank to support voltage level translation and ...
Electronic Design

Demo Platform Compares FPGA/CPLD Power

If you've ever wondered which FPGA/CPLD vendor offers the best performance at the lowest power, consider QuickLogic's Power Comparison Resource Package. Along with a corresponding Web site, it ...
EDN

Lattice ispLEVER Classic design tools support new CPLD family

The folks at Lattice Semiconductor have announced the immediate availability of their ispLEVER Classic version 1.2 design tool suite. This tool suite supports all Lattice SPLD, CPLD and select FPGA ...